JPS6058609A - 半導体薄膜結晶層の製造方法 - Google Patents

半導体薄膜結晶層の製造方法

Info

Publication number
JPS6058609A
JPS6058609A JP58166666A JP16666683A JPS6058609A JP S6058609 A JPS6058609 A JP S6058609A JP 58166666 A JP58166666 A JP 58166666A JP 16666683 A JP16666683 A JP 16666683A JP S6058609 A JPS6058609 A JP S6058609A
Authority
JP
Japan
Prior art keywords
thin film
semiconductor thin
scanning
crystal layer
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58166666A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0136974B2 (en]
Inventor
Koichi Kato
弘一 加藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Institute of Advanced Industrial Science and Technology AIST
Original Assignee
Agency of Industrial Science and Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Agency of Industrial Science and Technology filed Critical Agency of Industrial Science and Technology
Priority to JP58166666A priority Critical patent/JPS6058609A/ja
Publication of JPS6058609A publication Critical patent/JPS6058609A/ja
Publication of JPH0136974B2 publication Critical patent/JPH0136974B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/02433Crystal orientation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02488Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02587Structure
    • H01L21/0259Microstructure
    • H01L21/02598Microstructure monocrystalline
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02689Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02656Special treatments
    • H01L21/02664Aftertreatments
    • H01L21/02667Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02691Scanning of a beam

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Optics & Photonics (AREA)
  • Recrystallisation Techniques (AREA)
JP58166666A 1983-09-12 1983-09-12 半導体薄膜結晶層の製造方法 Granted JPS6058609A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58166666A JPS6058609A (ja) 1983-09-12 1983-09-12 半導体薄膜結晶層の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58166666A JPS6058609A (ja) 1983-09-12 1983-09-12 半導体薄膜結晶層の製造方法

Publications (2)

Publication Number Publication Date
JPS6058609A true JPS6058609A (ja) 1985-04-04
JPH0136974B2 JPH0136974B2 (en]) 1989-08-03

Family

ID=15835475

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58166666A Granted JPS6058609A (ja) 1983-09-12 1983-09-12 半導体薄膜結晶層の製造方法

Country Status (1)

Country Link
JP (1) JPS6058609A (en])

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS627113A (ja) * 1985-07-03 1987-01-14 Agency Of Ind Science & Technol 電子ビ−ムアニ−ル方法
JPH01168118A (ja) * 1987-12-24 1989-07-03 Fujitsu Ltd ディジタル式位相比較回路
JPH0264232U (en]) * 1988-11-02 1990-05-15
JPH0879031A (ja) * 1994-09-07 1996-03-22 Nec Corp 位相周波数比較器
JP2008227122A (ja) * 2007-03-13 2008-09-25 Sumitomo Heavy Ind Ltd レーザアニール方法およびレーザアニール装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58135631A (ja) * 1982-02-08 1983-08-12 Fujitsu Ltd ラテラルエピタキシヤル成長法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58135631A (ja) * 1982-02-08 1983-08-12 Fujitsu Ltd ラテラルエピタキシヤル成長法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS627113A (ja) * 1985-07-03 1987-01-14 Agency Of Ind Science & Technol 電子ビ−ムアニ−ル方法
JPH01168118A (ja) * 1987-12-24 1989-07-03 Fujitsu Ltd ディジタル式位相比較回路
JPH0264232U (en]) * 1988-11-02 1990-05-15
JPH0879031A (ja) * 1994-09-07 1996-03-22 Nec Corp 位相周波数比較器
JP2008227122A (ja) * 2007-03-13 2008-09-25 Sumitomo Heavy Ind Ltd レーザアニール方法およびレーザアニール装置

Also Published As

Publication number Publication date
JPH0136974B2 (en]) 1989-08-03

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